數(shù)字輔助的流水線AD轉(zhuǎn)換器理論與實(shí)現(xiàn)（影印版）

List of Figures
List of Tables
Acknowledgments
Preface
1. INTRODUCTION
1. Motivation
2. Overview
3. Chapter Organization
2. PERFORMANCE TRENDS
1. Introduction
2. Digital Performance Trends
3. ADC Performance Trends
3. SCALING ANALYSIS
1. Introduction
2. Basic Device Scaling from a Digital Perspective
3. Technology Metrics for Analog Circuits
4. Scaling Impact on Matching-Limited Circuits
5. Scaling Impact on Noise-Limited Circuits
4. IMPROVING ANALOG CIRCUIT EFFICIENCY
1. Introduction
2. Analog Circuit Challenges
3. The Cost of Feedback
4. Two-Stage Feedback Amplifier vs. Open-Loop Gain Stage
5. Discussion
5. OPEN-LOOP PIPELINED ADCS
1. A Brief Review of Pipelined ADCs
2. Conventional Stage Implementation
3. Open-Loop Pipeline Stages
4. Alternative Transconductor Implementations
6. DIGITAL NONLINEARITY CORRECTION
1. Overview
2. Error Model and Digital Correction
3. Alternative Error Models
7. STATISTICS-BASED PARAMETER ESTIMATION
1. Introduction
2. Modulation Approach
3. Required Sub-ADC and Sub-DAC Redundancy
4. Parameter Estimation Based on Residue Differences
5. Statistics Based Difference Estimation
6. Complete Estimation Block
7. Simulation Example
8. Discussion
8. PROTOTYPE IMPLEMENTATION
1. ADC Architecture
2. Stage 1
3. Stage 2
4. Post-Processor
9. EXPERIMENTAL RESULTS
1. Layout and Packaging
2. Test Setup
3. Measured Results
4. Post-Processor Complexity
10. CONCLUSION
1. Summary
2. Suggestions for Future Work
Appendices
A- Open-Loop Charge Redistribution
B- Estimator Variance
C- LMS Loop Analysis
1. Time Constant
2. Output Variance
3. Maximum Gain Parameters
References
Index